The present invention relates generally to integrated circuits and, more particularly, to a system and method for handling memory repair data in an integrated circuit having a plurality of memory systems.
Random defects occurring during the manufacturing of an integrated circuit can render certain components, such as a memory row or column, defective. To mitigate these defects, redundant rows and columns are provided to replace defective rows or columns discovered during initial testing. A test procedure typically generates repair data, sometimes referred to as a memory repair signature. The repair data is a binary coded sequence that identifies the detected defective components and the replacement redundant components. In one known memory testing operation, an on-chip built-in-self-test (BIST) engine is provided for testing memory locations within a memory block and for generating the memory repair data. Additionally, each memory block has a corresponding repair register that stores the generated memory repair data. Some BIST engines compress the repair data in order to save on storage space. Repair data is subsequently sent to a fuse processor that permanently burns the repair data in an on-chip fuse storage device such as an OTPROM (One Time Programmable Read Only Memory). When the integrated circuit is subsequently turned on, a fuse processor fetches the repair data from the fuse storage device and provides it to the corresponding memory block such that a faulty memory location is prevented from being used during memory read/write operations.
An integrated circuit device, particularly a “System on Chip” device, which typically has many functional modules may also include a plurality of memory blocks. Some of these memory blocks may support compressed repair data and some may not. For example, a Ternary Content Addressable Memory (TCAM) can only understand uncompressed repair data and so is incompatible with designs that support compressed repair data, where the repair signature registers are connected in a serial, chained fashion. Storage of uncompressed data rather than compressed data, disadvantageously, requires a larger fuse box (OTPROM). A further problem is that TCAM repair data is shifted to and from its associated repair register in a serial fashion, rather than in parallel as with other memory types, such as a compiled memory.
A single SOC may have several selectable “personalities” whereby it may be programmed to perform different functions by switching on or off one or more functional modules which, in turn, may include any combination of memory modules supporting or not supporting compressed repair data. Thus it would be advantageous to provide an integrated circuit in which different types of memory can co-exist and exhibit compatibility with a fuse box configured to store compressed repair data.